 LIBRARY IEEE ;
 USE IEEE.STD_LOGIC_1164.ALL ;
 USE IEEE.STD_LOGIC_UNSIGNED.ALL;
 ENTITY SQU IS
  PORT (   CIN   : IN  STD_LOGIC_VECTOR(7 DOWNTO 0);
           ADR   : IN  STD_LOGIC_VECTOR(7 DOWNTO 0);
             OT  : OUT  STD_LOGIC ) ;
 END ;
 ARCHITECTURE one OF SQU IS
 BEGIN
    
 PROCESS(CIN)   
    BEGIN
    IF ADR< CIN THEN  OT<='0' ;
     ELSE   OT<='1' ;   
   END IF;         
   END PROCESS;

  END ;
